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[Under Construction]

 

Програмно обезпечаване на контролери FATEK:

WinProladder v1.09 Build:4320 English  

WinProladder v1.08 Build:2826 English  

WinProladder Changes note  

PROLADDER-DOS V3.1-2 English 

Windows common controls Update file

 

Документация за контролери FATEK (в pdf формат)

Beginner guide English version

 DTBR-E User-Manual English

 Facon-Com-Protocol English Version

 

FB-PLC User's Manual (Basic)

Chap. 1: PLC Ladder Diagram and the Coding Rules of Mnemonic (861 KB)

 Chap. 2: FP-07 Programming Panel (7052 KB)

 Chap. 3: FB-PLC Memory Allocation (882 KB)

 Chap. 4: FB-PLC Instruction Lists (672 KB)

 Chap. 5: Sequential Instructions (395 KB)

 Chap. 6: Description of Function Instructions (936 KB)

 Chap. 7: Basic Function Instruction (3033 KB)

 Chap. 8: Step Instruction Description (1214 KB)

 Chap. 9 Advanced Application Instructions (15.8 MB)

 Chap. 10 FB-PLC Interrupt Function (380 KB)

 Chap. 11 FB-PLC High-Speed Counter and Timer (1451 KB)

 Chap. 12 The Communication Function of FB-PLC (882 KB)

 Chap. 13 The Applications for FB-PLC Link Function (2763 KB)

 Chap. 14 The NC Positioning Control of FB-PLC (1141 KB)

 Chap. 15 Application Of ASCII File Output Function (216 KB)

 Chap. 16 Real Time Clock (RTC) (132 KB)

 Chap. 17 FB-7SG 7-Segment LED Display Module (727 KB)

 Chap. 18 FB-6AD Analog Input Module (871 KB)

 Chap. 19 FB-2DA Analog Output Module (719 KB)

 Chap. 20 Temperature Measuring of FB-PLC and PID Control (2403 KB)

 Chap. 21 The PID Instruction and application of FB-PLC (385 KB)

 Appendix I FB-DAP Simple HMI

 

FB-PLC Hardware Manual

Chap. 1: FB-PLC Introduction (1630 KB)

 Chap. 2: I/O Expansion And System Combination (299 KB)

 Chap. 3: Installation Precautions (385 KB)

 Chap. 4: Power Supply Wiring and Power Calculation (254 KB)

 Chap. 5: Digital Input Circuit (383 KB)

 Chap. 6: Digital Output Circuit (702 KB)

 Chap. 7: Test Run, Monitor and Maintenance (254 KB)

 

Supplement of update function

Engineering-change-summary (138.55 KB)

 Appendix-Modbus-Fatek -- The rule of address mapping for Modbus & Fatek (78.60 KB)

 Appendix-Flash-Write -- CPU write Flash ROM directly (119.52 KB)

 Appendix-FUN22-BREAK -- Break from FOR & NEXT program loop (70.34KB)

 Appendix-FUN31-CRC16 -- CRC16 calculation (126.90 KB)

 Appendix-FUN32-ADCNV -- Converting the raw value of the 4~20mA analog input into the range of 0~4095 (112.51 KB)

 Appendix-FUN49-BUNIT -- Byte unite (125.54 KB)

 Appendix-FUN50-BDIST -- Byte distribute (120.54 KB)

 Appendix-FUN150-MBUS -- Modbus master (267.88 KB)

 Appendix-MA-MC-difference -- (195.52 KB)

 Appendix-all.zip -- Zip file for all above (833.59 KB)

 Appendix-ch-20.zip -- Zip file of chapter 20 (1193.57 KB)

 OS-V3.71 -- Engineering change for OS V3.71 (47.42 KB)

 OS-V3.72 -- Engineering change for OS V3.72 (35.45 KB)

 OS-V3.73 -- Engineering change for OS V3.73 (35.98 KB)

 OS-V3.74 -- Engineering change for OS V3.74 (35.98 KB)

 OS-V3.75 -- Engineering change for OS V3.75 (35.10 KB)

 OS-V3.76 -- Engineering change for OS V3.76 (39.03 KB)

 

Sample Program for FBE/FBN Series PLC

HPSO-RAMP-2 -- Acceleration/Deceleration sample for motion control (38.30 KB)

 


 

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Последни изменения:Януари 29 2012 г.